"We will demonstrate the following three technical achievements of our joint project: 1. Deployment of HarDNet on GPU (power consumption: 200 Watts) 2. Deployment of HarDNet on FPGA (power consumption: several tens of Watts) [winning 2nd place in the FPGA track, LPCVC 2020] 3. Deployment of HarDNet on lightweight edge devices such as Raspberry Pi (power consumption: single-digit, 10 Watts) [winning 3rd place in the DSP track4th place in the CPU track, LPCVC 2020]"

Low-power deep learning accelerator integrates neural network design / training, model compressionaccelerator design. It uses a small amount of computationmemory footprint to realize high performance on the edge device. The image semantic segmentation technology can reach 80 frames per second (resolution:1024*2048) to meet real-time requirements for autonomous driving.

Dynamic vision sensors have been investigated to report motion-only images for moving object recognition. Less but essential information helps post-process recognition algorithm reduces computationimproves accuracy. Implement low powerlow latency deep Learning chip based on neuromorphic Intelligence. The neuromorphic obstacle detection algorithm integrates visualproprioceptive signals. The algorithm is characterized by its efficiencylow power consumption. We possess the next-generation in-memory computing AI chipsnext-generation UAV key softwarehardware technology