SS-MRAM is a superlattice based magnetoresistive RAM, in which the barrier is made of superlattice to replace crystal MgO (001). The superlattice is a high spin polarization artificial metamaterial, which is composed of stable insulatormetal materials. Compared with the current STT-MRAM, SS-MRAM has the advantages of low readingwriting power consumption, fast readingwriting speed, s

"Introduce dielectric-fuse breakdown OTP (dFuse-OTP) technology: a.) dFuse is a newly discovered OTP mechanism which is totally different from the conventional mechanisms of anti-fuse, eFuse,charge-storage b.) IPs of dFuse OTPs have been protected globally c.) dFuse OTPs are totally integratedcompatible in the standard CMOS technologies without any additional masks d.) small layout celllow cost e.) dFuse OTPs have been at the phase of trial production in the first two big Taiwanese foundries."

"Visible Light Communication (VLC)" is the best candidate for the next generation of network communication owing to its wide bandwidthscompatibility with solid-state lighting devices. Our proposed technology features a novel multilevel photosensing memory which can integrate the photosensing, memorycomputation components for VLC into one device. This device is based on a thin film transistor, where the oxide semiconductor is added with gold nanoparticles to form a "co-active layer" in order to expand the visible light sensing spectrumefficiently convert the light signal into a current signal. It not only simplifies the production processreduces the cost, but also accelerates the signal transmission speed, which further advances the future mobile comm

A novel 3D-stack LTPO-based display array technology with CBRAM-embedded in a pixel has been successfully developed for the high-resolutionpower-saving near-eye VR/AR displays. Besides, a high-voltage gain CMOS inverter comprised by LTPO architecture is demonstrated acting as a digital driving circuit for the realistic FPD applications.

We proposed a dynamic-key secure DFT structure that can generate the keys dynamicallydefend scan-basedmemory attacks without decreasing the system performancethe testability. Analysis results show that our method can achieve a very high security levelthe security level will not decrease no matter how many times the attacker guesses due to the dynamic characteristic of our method.

1.Low-Power Processing-in-sensor CMOS Image Sensor 2.Implementation of Low-PowerLow-Latency Deep Learning Chip based on Neuromorphic Intelligence (collaborated with MOST 108-2622-8-007-009) 3.Development of Neuromorphic Chip based on The Fruit Fly VisualSpatial Sensory Systems 4.Hardware-Software Co-Design for Neuromorphic AI Chips

STT-MRAM: scaling down (submicron scale) along with issues of magnetic propertyintegration with semiconductor processing. SOT-MRAM: fundamental understanding on mechanism, integration with STT-MRAMCMOS for readout. VCMA-MRAM: understand the mechanism behind the observable VCMA phenomenon, integration with other RAMs for write/read.

Dynamic vision sensors have been investigated to report motion-only images for moving object recognition. Less but essential information helps post-process recognition algorithm reduces computationimproves accuracy. Implement low powerlow latency deep Learning chip based on neuromorphic Intelligence. The neuromorphic obstacle detection algorithm integrates visualproprioceptive signals. The algorithm is characterized by its efficiencylow power consumption. We possess the next-generation in-memory computing AI chipsnext-generation UAV key softwarehardware technology