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    • Low-Temperature Defects Elimination Technology for Semiconductor devices

      Electronic & Optoelectronics FutureTech Low-Temperature Defects Elimination Technology for Semiconductor devices

      The low-temperature defect passivation technology developed by our team can effectively eliminate defects in materials under 250°C, and leads to the improvement of the performance and reliability of devices. The technology has demonstrated the significant performance improvement when applying on GaN-based devices. After the treatment, the conducting current of FET devices is increased with the same operation condition. Moreover, in terms of LED devices, the emission efficiency was enhanced and the forward operating voltage decreased as well.
    • MethodStructure of stacking 3D-IC Employing Controlled-Grain Semiconductor Film

      Electronic & Optoelectronics FutureTech MethodStructure of stacking 3D-IC Employing Controlled-Grain Semiconductor Film

      The location of controlled-grain Si island is determined by the pattern of “cooling holes”. The grain size is determined by the distance between “holes” due to lateral grain growth using pulse laser crystallization. This predictability allows the transistorscircuits to stay away from the grain boundaries for monolithic
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