A CMOS image sensor is developed for the national space organization (NSPO) 3rd generation high-resolution remote sensing satellite,the main achievement is its capability to satisfy the demanded ground resolution of 0.5 m. This CMOS image sensor with a new time delay integration circuit is implemented using Back-Side Illumination CIS 0.13 μm technology. The anti-radiation capability of the chip is also boosted to extend the lifetime of the chip. Measurement systemdata analysis programs are developed to provide performance parameters of the proposed CMOS image sensor.

Taiwan Semiconductor Research Institute completed a CMOS image sensor chip by independent development. The main achievement is the capability to satisfy the required ground sampling distance 0.5 m. The back-side illumination CIS 0.13 μm process technology is used to obtain higher sensitivitythe new time delay integration technology is introduced to increase the SNR effectively. The boosted anti-radiation capability of the chip extends the lifetime of the chip. Measurement systemdata analysis programs are developed to provide performance parameters of the proposed CMOS image sensor.

In addition to helping remote sensing satellite collecting images of earth surface, this technology can also serve as a payload of any forms of remote sensing vehicles, for instance, unmanned aerial vehicle, space telescopepublic transportation vehicle. Combining with the widely promoted 5G communication technology, this image sensor technology can provide high resolution images to applications in a variety of fields, such as disaster prevention, ecological investigation, environmental protection, space observation, AI facial recognition, smart transportationautonomous cars.

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