"1. Automatically generate Verilog code tools based on the hardware architecture of convolutional neural networks: 4 different hardware architectures (output stationary, weight stationary, Tree architecture, NVDLA) can be generated for the currently more commonly used DNN networks. 2. Visual performance index analysis tool: According to the selected DNN model,the choice of hardware architecture specifications, analyze the performance index."

"1. Use PE Cluster to make the calculation reconfigurable,can be modularized into 36X PEs, supporting up to 2160PEs 2. It can be configured as an independent IP with high computing throughputlow power consumption. The computing performance can reach 864 GOPS@200MHz when 2160PEs are employed."