In this technique, it can synthesize high-qualitylarge area graphene. We develop batch to batch chemical vapor deposition (B2B-CVD) to reduce the cost to facilitate the industrialized production. At the same time, the development of high-quality six-inch graphene silicon wafers was made with our unique transferring process. The wafer can be used as epitaxial substrates, which can solve the bottleneck of poor heat dissipation of sapphire substrates, lattice mismatch of Si substrates,expensive SiCGaN substrates.

"The SPC process technology developed by our team has a patented cloth surface treatmentmultiple layers of conductive circuit layers (Layout) without etchingtransfer printing processes. It can not only be continuously automated production (piece to piece), but also Environmental protection, in line with the green trend of cleaner production. Features: 1. E-textiles 2. Twistable 3. Folded (0-180 degree angle) 4. Cleaning 5. Customized"

This technology proposes the preparation of Anodic Aluminum Oxide (AAO) templates on the surface of aluminum. The structural color of AAO is combined with lithography process to form patterns on the substrate, which can achieve high resolution on various aluminum substrate for decoration. Also, rewritable boardinvisible anti-counterfeiting technology are proposed for innovative applications by the low-cost, high-efficiency,high-saturation AAO structural colorpatterning.

A novel balanced BPF using the folded half-mode substrate integrated waveguide has a central frequency of 4.65 GHz with 0.55 GHz BWin-band insertion loss of 2.2 dB. The size of an FHMSIW is about 1/4 of the substrate integrated waveguide (SIW). The common-mode rejection levels are greater than 40 dB over a wide frequency range.

We grew p-GaN HEMT on a low-resistance SiC substrateadded a AlGaN cap layer above the p-GaN layer. We use the wide band gap material AlGaN as the cap layer, which can effectively suppress the holes injectionachieve the purpose of improving the gate reliability. In addition, we chose a zero-degree anglelow-resistance SiC substrate, which not only greatly reduces the lattice dislocation defects caused by the heterogeneous junction, but also greatly reduces the overall cost.