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Technique
Novel Monolithic 3D Heterogeneous Semiconductor Device Integration for Ultra-High-Density (20M NAND-Gate/mm^2) Logic Gate Circuits
Unit
National Taiwan University
Exhibition Zone
半導體/Semiconductor
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Development for Advanced High-Density Monolithic Three Dimensional Integrated Circuits with Multi-stacked Transistor Layers
Unit
Department of Photonics, National Yang Ming Chiao Tung University
Exhibition Zone
電子&光電 Electronics & Optoelectronics
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Technique
搭載畫素內嵌記憶體之低溫複晶矽氧化物薄膜電晶體陣列技術於超高解析度節能近眼穿戴顯示裝置應用
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Department of Photonics, National Chiao Tung University
Exhibition Zone
電子&光電 Electronics & Optoelectronics
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Hybrid CMOS Inverter Comprised of Thin Film Transistors with Hetero-channel for Monolithic 3D-ICs and Ultra-high Resolution Flat-Panel Displays Applications
Unit
Department of Photonics, National Chiao Tung University
Exhibition Zone
Online display only
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Technique
Hybrid Complementary Thin Film Transistors for Pixel Device and Periphery Circuit Applications
Unit
National Chiao Tung University
Exhibition Zone
Online display only
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