The ALE of Si is realized using alternating procedures of the self-limiting IL formation and self-stop IL removal steps, giving rise to the conformal, uniform, and layer-by-layer etching. The cALE technique possesses a precise etching rate of angstrom scale per cALE cycle and a high linearity between the etching depth and the applied cALE cycles. Because of the self-limiting deposition and the self-stop wet etching, the cALE process leaves behind a smooth and damage-free surface.

We propose a novel low-temperature (≤300°C), conformal atomic layer etching (cALE) with a few angstroms etching accuracy approach based on etching away of the interfacial layer (IL) between the oxide and Si. As compared with conventional etching processes, the cALE can be applied to precisely tailor the channel width of Fin-FET and the channel diameter of gate-all-around (GAA) transistors with atomic scale fidelity.

The conformal atomic layer etching (cALE) possesses a precise etching rate of Å scale per cycle and high linearity between the etching depth and the applied cycles. Because of the self-limiting deposition and the self-stop wet etching, the cALE process leaves behind a smooth and damage-free surface after etching. The cALE technique is a promising method to reach precise atomic-scale fidelity for next-generation atomic-scale semiconductor devices.